为什么出路而不是未来呢？因为行业在挣扎，没有出路，哪有未来？。众所周知，芯片设计行业自2015年以来进入整合期（consolidation），因为不论公司大小和技术先进与否，芯片产业的利润率在急剧下降。新的killer application还没有出现，被予以厚望的IoT还在标准整合阶段，而且似乎用户对现有产品并不十分买账，已有的市场（PC和手机）却已经接近饱和；新来者挑战行业老大的方式只有低价竞争；28nm以后mask成本大幅度上升，不少公司（包括Marvell）都提出要从设计成本里面榨取利润。那如何榨取利润呢？缩减工程师数量；将工作转移到中国或者印度等成本较低的区域；提升流片成功率，减少mass production之前的流片次数。但是同时要面临的挑战则是市场对新功能的要求并没有停止，对整合程度的要求更高了，对芯片可用性和易用性的要求丝毫没有降低甚至更高了。因为有更多的小微创业企业加入到硬件创业的大潮中，打算趁着IoT的东风飞一把。那么在这个过程中，芯片设计工程师们能够做的只剩下提升生产效率了。提高EDA的自动化程度是非常重要的一个环节，只是EDA软件成本已经成为研发成本中非常大的一个比例，而且随着EDA行业的整合和垄断还有不断增大的趋势。那么我们是否可以从设计方法方面进行一些挖掘和提高呢？
Yesterday I found a website, AgileSoC.com. Its name apparently and perfectly demostrates its purpose. Two IC engineers, mostly verification, starting from 2009 are trying to apply agile method which is very popular in software programming into digital IC design and verfication. They believe that it will improve the productivity of IC design dramatically.
This is exactly what I’m thinking about these days. Because as I observed the developement flow and methodology in IC design is very old fasion, and more and more is shown that it cannot satisfy modern IC’s complexity and scale. The more sucessful company / team the older fasion their flow is. If any new company that can invent or adopt more advanced flow and methodology, they will have better chance to succeed and overthrow the major players.
In my opinion, there are several key points in agile developement cycles that are super important especially for IC designer.
- Unit test and test driven design
Write testbench and tests before model and RTL. This will help designers understand better about the SPEC, weakness spots and what difficulties to be expected.
- Code review (including test)
Code review among team members is important. Two persons inspite of their seniority and competence should be working on the same feature and review each other’s code together. Explain what you do to others is a very good thinking process for any engineers, and it will improve your understandings of what you supposed to do.
- Fast iteration, starting from minimum workable system
By instinct, lots of people will doubt whether fast iteration will fit IC design or not, because tape-out is so expensive that we cannot play with it at all. In my opinion, iteration should not mean from tape-out to tape-out in IC design, it should stay within each tape-out or new design cycle. In front-end design and verification, starting from a minimun workable system is super important to eliminate any suprise in later design stage; iterations can go in parallel with SPEC definition (nobody can begin their work with a clean start and clearly defined SPEC) and verification coverage improvement. In back-end design, iterations will give better idea about real hardware/timing impact for different feature/function changes, and earlier floorplan changes; iterations can go in parallel with floorplan finalization (it always requires lots of communications with or within SoC team and different departments) and power plan.