Tag: paper

Summary of my publications

Zero-Efficient Buffer Design for Reliable Network-on-Chip in Tiled Chip-Multi-Processor Network-on-Chip (NoC) is a promising solution for efficient interconnection between processor cores in Chip-Multi-Processor (CMP). This paper is focusing on the energy-efficient design of buffers, a group of the most important components in NoC. From our investigation, an overwhelming majority of "zero" is contained in the … Continue reading Summary of my publications

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